Set Auxiliary Mode Register. Bits 7 to 5 determine which register is set. Bits 4 to 0 specify the value to write into the register. Tables giving the values for bits 4 to 0 for each auxiliary mode register follow the main table.
|
Bit
|
Value
|
Meaning
|
|
7
|
128
|
CNT2 - Control Code 2
|
|
6
|
64
|
CNT1 - Control Code 1
|
|
5
|
32
|
CNT0 - Control Code 0
|
|
4-0
|
-
|
COM4-COM0 - Command Codes 4-0
|
Auxiliary Command Register. If CNT2-CNT0 are set to 000 (binary), bits 4 to 0 are defined by the following values:
|
Auxiliary Command
|
SET
|
CLEAR
|
|
Immediate Execute pon
|
0
|
xx
|
|
Chip Reset
|
2
|
xx
|
|
Finish Handshake
|
3
|
xx
|
|
Trigger
|
4
|
xx
|
|
Return to Local
|
5
|
13
|
|
Send EOI
|
6
|
xx
|
|
Non-Valid/Valid 2nd Cmd./Add.
|
7
|
15
|
|
Parallel Poll Flag
|
9
|
1
|
|
Goto Standby
|
16
|
xx
|
|
Take Control Asynchronously
|
17
|
xx
|
|
Take Control Synchronously
|
18
|
xx
|
|
Take Control Synch. on End
|
26
|
xx
|
|
Listen
|
19
|
xx
|
|
Listen in Continuous Mode
|
27
|
xx
|
|
Local Unlisten
|
28
|
xx
|
|
Execute Parallel Poll
|
29
|
xx
|
|
Send Interface Clear
|
30
|
22
|
|
Send Remote Enable
|
31
|
23
|
|
Disable System Controller
|
20
|
xx
|
Internal Counter Register. If CNT2-CNT0 are set to 001 (binary), bits 4 to 0 specify the State Change Prohibit Times.
Parallel Poll Register. If CNT2-CNT0 are set to 011 (binary), bits 4 to 0 have the following meaning:
|
Bit
|
Value
|
Meaning
|
|
4
|
16
|
Disables Participation in Parallel Poll
|
|
3
|
8
|
Logic Sense of Status
|
|
2-0
|
-
|
Data Line to Assert During Poll
|
Auxiliary Register A. If CNT2-CNT0 are set to 100 (binary), bits 4 to 0 have the following meaning.
|
Bit
|
Value
|
Meaning
|
|
4
|
16
|
Select 8-bit EOS length
|
|
3
|
8
|
Enable Transmit of EOS
|
|
2
|
4
|
Enable Receive of EOS
|
|
1
|
2
|
RFD Hold Off on End
|
|
0
|
1
|
RFD Hold Off on All Data
|
Auxiliary Register B. If CNT2-CNT0 are set to 101 (binary), bits 4 to 0 have the following meaning.
|
Bit
|
Value
|
Meaning
|
|
4
|
16
|
Indicates the Value of ist
|
|
3
|
8
|
Active Level of The INT Pin
|
|
2
|
4
|
Sets high speed as T(1)
|
|
1
|
2
|
Enable Transmit of END in Serial Poll
|
|
0
|
1
|
Enable Setting of CPT bit if Undefined Cmd.
|
Auxiliary Register E. If CNT2-CNT0 are set to 110 (binary), bits 4 to 0 have the following meaning.
|
Bit
|
Value
|
Meaning
|
|
4-2
|
-
|
Unused
|
|
1
|
2
|
Enable DAC Hold-Off by DCAS State
|
|
0
|
1
|
Enable DAC Hold-Off by DTAS State
|